Memory controllers are circuits that translate accesses generated by a memory accessing agent such as a data processor into one or more commands that are understood by computer memory. A memory controller can be implemented as a separate chip or integrated with other components such as data processors on a single integrated circuit chip. In the latter case, the memory controller is usually called an integrated memory controller. Typical integrated memory controllers support the double data rate dynamic random-access memory (DDR DRAM) bus protocol, but support only pre-existing DDR DRAM devices or devices that operate like them. The need for tight coupling of memory with computing resources like central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DPSs), and the like pose challenges to the system designer related to memory capacity requirements, memory controller availability, memory lifecycle limitations, and memory bandwidth availability to CPUs. Capabilities such as in-memory workloads and server virtualization drive the need for increasing memory capacity. Moreover, the increasing performance of CPUs creates a need for more memory channels per socket. For example, memory capacity requirements are driven by the number of CPUs in order to maintain balanced computational resources for many workloads. Furthermore, lifecycles of memory generations are limited, requiring memory controller re-design when new memory generations are introduced.
In an effort to address these evolving needs, designers have developed new types of memory and memory systems. For example, one new type of memory known as storage class memory (SCM) uses dual inline memory modules (DIMMs) similar to standard DDR DRAM, but uses NAND Flash as a backing store and DRAM as a local cache for active data. One new type of memory system, known as GenZ, uses a standard interface protocol between processors and media in a communication fabric to support both directly attached memory and multiple levels of fabric attached memory of different types.
In the following description, the use of the same reference numerals in different drawings indicates similar or identical items. Unless otherwise noted, the word “coupled” and its associated verb forms include both direct connection and indirect electrical connection by means known in the art, and unless otherwise noted any description of direct connection implies alternate embodiments using suitable forms of indirect electrical connection as well. Additionally, the terms remap and migrate, and variations thereof, are utilized interchangeably as a descriptive term for relocating.